DIGITAL INTEGRATED CIRCUITS CYCLE TIME Vs PROCESS EFFECTIVE DETECTION COVERAGE

CYCLE TIME (PCT) EXTERNAL VISUAL/PHYSICAL DIM 1/ RTS & Die I.D. X-RAY CSAM/MFG VERIF. DC & FUNCTIONAL @ 25°C 2/ AC & DC @ 25°C 2/ INTERNAL VISUAL/MFG VERIF. 3/ CROSS SECTION/MFG VERIF. SEM/MFG VERIF. FTIR/MFG VERIF. AC, DC, FUNCTIONAL OVER TEMP RANGE CDC 4/, 5/
(DAYS) Step 1 Step 2 Step 3 Step 4 Step 5 Step 6 Step 7 Step 8 Step 9 Step 10 Step 11  
1   20                   20.00
1 20                     20.00
1     25                 25.00
2       15               7.50
3         75             25.00
4           25           6.25
5                   15   3.00
7             35         5.00
8               35       4.38
9                 35     3.89
14                     95 6.79

Selection of highest confidence test processes for optimization

CDC Step# Tests #DAYS
20 1 EXTERNAL VISUAL/PHYSICAL DIM 1
20 2 RTS & Die I.D. 1
25 3 X-RAY 1
7.5 4 CSAM 2
25 5 DC & FUNCTIONAL @ 25°C 3
97.5% CONFIDENCE   CYCLE TIME 8  

1/. - External visual verification on Form, Fit, and Part number against part number specification.
2/. - Limited to critical functional and / or AC, DC parameters for electrical testing per mfg. datasheet at 25°C. No design parameters to be tested.
3/. - Destructive samples required for Steps 7-10.
4/. - Counterfeit Detection Confidence. CDC = EDC/PCT.
5/. - Numbers inside the matrix represent the process Effective Detection Coverage (EDC) to the characteristics and property definition of the device under test, supported by historical testability data.

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Risk Analysis Continued